The aim of the course is to introduce the participants to asynchronous circuit design. The course will motivate the use of asynchronous circuits and teach the basic theory and concepts, such that the participants will be able to: (1) design control and data-processing circuits, and (2) read and understand the literature on asynchronous circuit design.
Learning objectives:
A student who has met the objectives of the course will be able to:
Evaluate and explain of it is advantageous to use asynchronous circuits when implementing a digital circuit for a given application, and assess the effect on the properties of the circuit (energy, speed, area etc.).
Implement typical handshake components using typical handshake protocols.
Specify and design ”speed independent” control circuits using relevant design methods and CAD tools.
Construct smaller computing circuits by manually composing so-called handshake components.
Design larger digital circuits using CAD-tools based on syntax directed translation
Assess which handshake protocol is most appropriate to use in a given situation.
Explain what it means that a circuit is ”speed independent” or ”delay insensitive”, and analyze if a given smaller (control)circuit possesses one of these properties.
Analyze and optimize the speed of a circuit which is built from handshake components; by using qualitative reasoning and by performing quantitative calculations.
Identify and explain the problems related to communicating between several clock domains, devise possible solutions and reason about the performance and reliability of these.
Content:
Motivation for using asynchronous circuits. Basic concepts, communication protocols, and circuit implementation styles. Simple circuit examples. Performance analysis: qualitatively and quantitatively (latency, wavelength, and cycle time). Fundamental theoretical concepts: classification (self-timed, speed-independent, delay-insensitive), hazards, isochronic forks and logic thresholds, arbitration. Control circuits: synthesis of speed-independent control circuits from signal transition graph specifications. Data-path circuits: design of efficient data-path circuits with completion detection/indication. Four-phase bundled-data circuits: Simple, semi-decoupled, and fully-decoupled latch controllers. Normally opaque and normally transparent latch controllers. Early, broad and late protocols. Design strategies/methods: static data-flow structures and compilation from asynchronous HDL's. Case studies: some recent (commercial) asynchronous IC's. Current research trends.
Remarks:
Asynchronous circuits are sometimes called clockless circuits. If you want to know more about the technology before signing up for the course you may check: http://intranet.cs.man.ac.uk/apt/async/ (the international "Asynchronous logic homepage").
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